Two spacecraft have achieved a rare milestone: recreating a total solar eclipse in space. The European Space Agency’s (ESA) Proba-3 mission released the first images on June 16 from a successful test where one satellite blocked the sun’s light, allowing the other to capture the blazing outer atmosphere—the corona. Unlike fleeting eclipses on Earth, this artificial version offers prolonged, repeated observations. “We could see the corona without any special image processing,” said Andrei Zhukov of the Royal Observatory of Belgium. “It was just visible there, like during a natural total solar eclipse.”
ESA’s Proba-3 Spacecraft Recreates Eclipses to Study Sun’s Million-Degree Corona in Unprecedented Detail
As per ESA reports, the Proba-3 spacecraft orbits Earth in an elliptical path, up to 60,000 kilometres at the far end. During alignment, they float a mere 150 metres apart, one satellite casting an accurate shadow on the other. This method allows scientists to block the sun’s brightly radiant disk and view the faint, million-degree corona, which is some 200 times hotter than the sun’s visible surface and can be observed only during total eclipses. The middle layer is where scientists think answers to why this outer region is so blisteringly hot may be found.
So far, the twin satellites have completed nine test eclipses, with the goal of performing two per week. While natural eclipses only happen every 18 months or so and last just a matter of minutes, Proba-3 could replicate an eclipse every 20 hours and prolong it for up to six hours. This capability gives scientists a unique opportunity to investigate in detail the solar corona’s dynamic and magnetic activity.
Proba-3 was lifted off to orbit from India on December 5. Over the next two years, the spacecraft is anticipated to provide upwards of 1,000 hours of eclipse data. The discovery not only makes it possible to systematically observe solar behavior but also helps to enhance the forecasts of solar weather needed to protect satellites and power grids.
ESA officials view this as a new era in heliophysics, where man-made eclipses will fill the observational gap left by the rarity of total solar eclipses on Earth. With each orbit and eclipse, scientists inch closer to solving the long-standing mysteries of our star’s fiery halo.
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#Spacecraft #Recreate #Artificial #Solar #Eclipses #Observe #Suns #Superhot #Corona
![IBM Crosses One of Computing’s Biggest Barriers With World’s First Sub-1 Nanometer Chip
In a major breakthrough, IBM revealed the world’s first semiconductor chip technology built on a sub-1 nanometer chipmaking process. For comparison, the process uses transistor features smaller than the width of a DNA strand, which measures about 2.5 nanometers across. The chip itself is about the size of a fingernail but holds almost 100 billion transistors, and the company expects it could enter markets as early as the next five years. In a statement released today, IBM said the new chip features nearly twice the density of its 2-nanometer chip, released in 2021. According to an accompanying technical report, the chip also demonstrated up to 70% greater energy efficiency than its predecessor. In designing the chip, researchers developed an “entirely new transistor architecture” called nanostack, which “vertically stacks and staggers transistors” to enable IBM’s 0.7-nanometer chip technology, IBM explained. A section of the chip seen with a transmission electron microscope. Credit: IBM “With our new nanostack architecture, we’re not just making smaller transistors,” Jay Gambetta, director of IBM Research, said in the statement. “We’re reinventing how chips are built to deliver dramatically more power and energy efficiency.”
Smaller and smaller Semiconductor chips enable things like computers, home appliances, communications, and transportation devices. In 1965, Intel co-founder Gordon Moore surmised that transistor capacities evolved at a predictable and consistent rate. Specifically, all things considered, the number of transistors on a semiconductor chip would double about every two years. For a while, the so-called Moore’s Law held rather well—until, that is, things hit a literal wall.
“Moore’s Law was never meant to last forever,” according to a blog post by the Massachusetts Institute of Technology’s (MIT) Computer Science and Artificial Intelligence Lab. “Transistors can only get so small and, eventually, the more permanent laws of physics get in the way.” That is, as companies try to cram more transistors into smaller chips, new advances in transistor technology take longer than two years, so Moore’s Law has been over since at least 2016, Charles Leiserson, a computer scientist at MIT, said in the blog. Accordingly, the issue now is to consider how improvements in chip performance fit into a longer-term picture, Willy Shih, an economist at Harvard Business School, said in an explainer.
Reaching atomic levels In that sense, IBM’s latest chip represents an inventive approach for bypassing the limits of physical scaling. Specifically, two wafers with nanosheet-style transistors are glued together like a sandwich to vertically stack two layers of transistors, and related technical assessments suggested that the wafer stacking was flexible and scalable enough to support real computation, Huiming Bu, vice president of IBM’s silicon technology research team, said in a press briefing on the chip. Researcher holding IBM’s sub-1 nm node wafer. Credit: IBM That said, this chip isn’t quite ready for manufacturing just yet. The company’s goal is to enter production in the next five years, but there’s still work to be done. For instance, Bu pointed out that the team was still working on pathways to prevent thermal noise or integration into existing systems in the high-performance computing community. “From my perspective, I hope to see it be as successful as the 2-nanometer [chip] and become the industry platform,” Gambetta said during the briefing. “And as we see with AI and classical computing in general, we are only seeing more and more consumption.” #IBM #Crosses #Computings #Biggest #Barriers #Worlds #Sub1 #Nanometer #ChipIBM,Semiconductors,transistors](https://gizmodo.com/app/uploads/2026/06/nanostacking-ibm-sub-nm-chip-1280x720.jpg "IBM Crosses One of Computing’s Biggest Barriers With World’s First Sub-1 Nanometer Chip
In a major breakthrough, IBM revealed the world’s first semiconductor chip technology built on a sub-1 nanometer chipmaking process. For comparison, the process uses transistor features smaller than the width of a DNA strand, which measures about 2.5 nanometers across. The chip itself is about the size of a fingernail but holds almost 100 billion transistors, and the company expects it could enter markets as early as the next five years. In a statement released today, IBM said the new chip features nearly twice the density of its 2-nanometer chip, released in 2021. According to an accompanying technical report, the chip also demonstrated up to 70% greater energy efficiency than its predecessor. In designing the chip, researchers developed an “entirely new transistor architecture” called nanostack, which “vertically stacks and staggers transistors” to enable IBM’s 0.7-nanometer chip technology, IBM explained. A section of the chip seen with a transmission electron microscope. Credit: IBM “With our new nanostack architecture, we’re not just making smaller transistors,” Jay Gambetta, director of IBM Research, said in the statement. “We’re reinventing how chips are built to deliver dramatically more power and energy efficiency.”
Smaller and smaller Semiconductor chips enable things like computers, home appliances, communications, and transportation devices. In 1965, Intel co-founder Gordon Moore surmised that transistor capacities evolved at a predictable and consistent rate. Specifically, all things considered, the number of transistors on a semiconductor chip would double about every two years. For a while, the so-called Moore’s Law held rather well—until, that is, things hit a literal wall.
“Moore’s Law was never meant to last forever,” according to a blog post by the Massachusetts Institute of Technology’s (MIT) Computer Science and Artificial Intelligence Lab. “Transistors can only get so small and, eventually, the more permanent laws of physics get in the way.” That is, as companies try to cram more transistors into smaller chips, new advances in transistor technology take longer than two years, so Moore’s Law has been over since at least 2016, Charles Leiserson, a computer scientist at MIT, said in the blog. Accordingly, the issue now is to consider how improvements in chip performance fit into a longer-term picture, Willy Shih, an economist at Harvard Business School, said in an explainer.
Reaching atomic levels In that sense, IBM’s latest chip represents an inventive approach for bypassing the limits of physical scaling. Specifically, two wafers with nanosheet-style transistors are glued together like a sandwich to vertically stack two layers of transistors, and related technical assessments suggested that the wafer stacking was flexible and scalable enough to support real computation, Huiming Bu, vice president of IBM’s silicon technology research team, said in a press briefing on the chip. Researcher holding IBM’s sub-1 nm node wafer. Credit: IBM That said, this chip isn’t quite ready for manufacturing just yet. The company’s goal is to enter production in the next five years, but there’s still work to be done. For instance, Bu pointed out that the team was still working on pathways to prevent thermal noise or integration into existing systems in the high-performance computing community. “From my perspective, I hope to see it be as successful as the 2-nanometer [chip] and become the industry platform,” Gambetta said during the briefing. “And as we see with AI and classical computing in general, we are only seeing more and more consumption.” #IBM #Crosses #Computings #Biggest #Barriers #Worlds #Sub1 #Nanometer #ChipIBM,Semiconductors,transistors")
![IBM Crosses One of Computing’s Biggest Barriers With World’s First Sub-1 Nanometer Chip
In a major breakthrough, IBM revealed the world’s first semiconductor chip technology built on a sub-1 nanometer chipmaking process. For comparison, the process uses transistor features smaller than the width of a DNA strand, which measures about 2.5 nanometers across. The chip itself is about the size of a fingernail but holds almost 100 billion transistors, and the company expects it could enter markets as early as the next five years. In a statement released today, IBM said the new chip features nearly twice the density of its 2-nanometer chip, released in 2021. According to an accompanying technical report, the chip also demonstrated up to 70% greater energy efficiency than its predecessor. In designing the chip, researchers developed an “entirely new transistor architecture” called nanostack, which “vertically stacks and staggers transistors” to enable IBM’s 0.7-nanometer chip technology, IBM explained. A section of the chip seen with a transmission electron microscope. Credit: IBM “With our new nanostack architecture, we’re not just making smaller transistors,” Jay Gambetta, director of IBM Research, said in the statement. “We’re reinventing how chips are built to deliver dramatically more power and energy efficiency.”
Smaller and smaller Semiconductor chips enable things like computers, home appliances, communications, and transportation devices. In 1965, Intel co-founder Gordon Moore surmised that transistor capacities evolved at a predictable and consistent rate. Specifically, all things considered, the number of transistors on a semiconductor chip would double about every two years. For a while, the so-called Moore’s Law held rather well—until, that is, things hit a literal wall.
“Moore’s Law was never meant to last forever,” according to a blog post by the Massachusetts Institute of Technology’s (MIT) Computer Science and Artificial Intelligence Lab. “Transistors can only get so small and, eventually, the more permanent laws of physics get in the way.” That is, as companies try to cram more transistors into smaller chips, new advances in transistor technology take longer than two years, so Moore’s Law has been over since at least 2016, Charles Leiserson, a computer scientist at MIT, said in the blog. Accordingly, the issue now is to consider how improvements in chip performance fit into a longer-term picture, Willy Shih, an economist at Harvard Business School, said in an explainer.
Reaching atomic levels In that sense, IBM’s latest chip represents an inventive approach for bypassing the limits of physical scaling. Specifically, two wafers with nanosheet-style transistors are glued together like a sandwich to vertically stack two layers of transistors, and related technical assessments suggested that the wafer stacking was flexible and scalable enough to support real computation, Huiming Bu, vice president of IBM’s silicon technology research team, said in a press briefing on the chip. Researcher holding IBM’s sub-1 nm node wafer. Credit: IBM That said, this chip isn’t quite ready for manufacturing just yet. The company’s goal is to enter production in the next five years, but there’s still work to be done. For instance, Bu pointed out that the team was still working on pathways to prevent thermal noise or integration into existing systems in the high-performance computing community. “From my perspective, I hope to see it be as successful as the 2-nanometer [chip] and become the industry platform,” Gambetta said during the briefing. “And as we see with AI and classical computing in general, we are only seeing more and more consumption.” #IBM #Crosses #Computings #Biggest #Barriers #Worlds #Sub1 #Nanometer #ChipIBM,Semiconductors,transistors](https://i1.wp.com/gizmodo.com/app/uploads/2026/06/nanostacking-ibm-sub-nm-chip-1280x720.jpg?ssl=1 "IBM Crosses One of Computing’s Biggest Barriers With World’s First Sub-1 Nanometer Chip
In a major breakthrough, IBM revealed the world’s first semiconductor chip technology built on a sub-1 nanometer chipmaking process. For comparison, the process uses transistor features smaller than the width of a DNA strand, which measures about 2.5 nanometers across. The chip itself is about the size of a fingernail but holds almost 100 billion transistors, and the company expects it could enter markets as early as the next five years. In a statement released today, IBM said the new chip features nearly twice the density of its 2-nanometer chip, released in 2021. According to an accompanying technical report, the chip also demonstrated up to 70% greater energy efficiency than its predecessor. In designing the chip, researchers developed an “entirely new transistor architecture” called nanostack, which “vertically stacks and staggers transistors” to enable IBM’s 0.7-nanometer chip technology, IBM explained. A section of the chip seen with a transmission electron microscope. Credit: IBM “With our new nanostack architecture, we’re not just making smaller transistors,” Jay Gambetta, director of IBM Research, said in the statement. “We’re reinventing how chips are built to deliver dramatically more power and energy efficiency.”
Smaller and smaller Semiconductor chips enable things like computers, home appliances, communications, and transportation devices. In 1965, Intel co-founder Gordon Moore surmised that transistor capacities evolved at a predictable and consistent rate. Specifically, all things considered, the number of transistors on a semiconductor chip would double about every two years. For a while, the so-called Moore’s Law held rather well—until, that is, things hit a literal wall.
“Moore’s Law was never meant to last forever,” according to a blog post by the Massachusetts Institute of Technology’s (MIT) Computer Science and Artificial Intelligence Lab. “Transistors can only get so small and, eventually, the more permanent laws of physics get in the way.” That is, as companies try to cram more transistors into smaller chips, new advances in transistor technology take longer than two years, so Moore’s Law has been over since at least 2016, Charles Leiserson, a computer scientist at MIT, said in the blog. Accordingly, the issue now is to consider how improvements in chip performance fit into a longer-term picture, Willy Shih, an economist at Harvard Business School, said in an explainer.
Reaching atomic levels In that sense, IBM’s latest chip represents an inventive approach for bypassing the limits of physical scaling. Specifically, two wafers with nanosheet-style transistors are glued together like a sandwich to vertically stack two layers of transistors, and related technical assessments suggested that the wafer stacking was flexible and scalable enough to support real computation, Huiming Bu, vice president of IBM’s silicon technology research team, said in a press briefing on the chip. Researcher holding IBM’s sub-1 nm node wafer. Credit: IBM That said, this chip isn’t quite ready for manufacturing just yet. The company’s goal is to enter production in the next five years, but there’s still work to be done. For instance, Bu pointed out that the team was still working on pathways to prevent thermal noise or integration into existing systems in the high-performance computing community. “From my perspective, I hope to see it be as successful as the 2-nanometer [chip] and become the industry platform,” Gambetta said during the briefing. “And as we see with AI and classical computing in general, we are only seeing more and more consumption.” #IBM #Crosses #Computings #Biggest #Barriers #Worlds #Sub1 #Nanometer #ChipIBM,Semiconductors,transistors")
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