Even three years after the generative AI boom started, most AI startups are still making money by selling to businesses, not individual consumers.
Although consumers quickly adopted general-purpose LLMs like ChatGPT, most specialized consumer GenAI applications have yet to resonate.
“A lot of early AI applications around video, audio, and photo were super cool,” said Chi-Hua Chien, co-founder and managing partner at Goodwater Capital, onstage at TechCrunch’s StrictlyVC event in early December. “But then Sora and Nano Banana came out, and the Chinese open sourced their video models. And so, a lot of those opportunities disappeared.”
Chien compares some of those applications to the simple flashlight, which was initially a popular third-party download after the iPhone launched in 2008 but was quickly integrated into iOS itself.
He argued that, just as it took a few years for the smartphone platform to solidify before game-changing consumer apps emerged, AI platforms need a similar period of “stabilization” for lasting AI consumer products to flourish.
“I think we’re right on the cusp of the equivalent to mobile of the 2009-2010 era,” Chien said. That period was the birth of massive mobile-first consumer businesses like Uber and Airbnb.
We could be seeing inklings of that stabilization with Google’s Gemini reaching technological parity with ChatGPT, Chien said.
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Elizabeth Weil, founder and partner at Scribble Ventures, echoed Chien’s sentiment about the early days of GenAI, describing the current state of consumer AI applications as being in an “awkward teenage middle ground.”
What will it take for consumer AI startups to grow up? Possibly a new device beyond the smartphone.
“It’s unlikely that a device that you pick up 500 times a day but only sees 3% to 5% of what you see is going to be what ultimately introduces the use cases that take full advantage of AI’s capabilities,” Chien said.
Weil agreed that a smartphone may be too limiting for reimagining consumer AI products in large part because it is not ambient. “I don’t think we’re going to be building for this in five years,” she said, indicating her iPhone as she showed it to the audience.
Startups and incumbent tech companies have been racing to build a new personal device that can supplant smartphones.
OpenAI and Apple’s former design chief, Jony Ive, are working on what’s rumored to be a “screenless,” pocket-sized device. Meta’s Ray-Ban smart glasses are controlled by a wristband that detects subtle gestures. Meanwhile, a number of startups are trying, with often disappointing results, to introduce a pin, pendant, or ring that uses AI in a way different from how smartphones do.
However, not every AI consumer product will be dependent on a new device. Chien suggested that one such offering could be a personal AI financial adviser customized to the user’s specific needs. Similarly, Weil anticipates that a personalized, “always-on” tutor will become ubiquitous, with its specialized tutelage delivered directly from a smartphone.
Though excited by AI’s potential, Weil and Chien expressed skepticism about the emergence of several, still-stealthy AI-powered social network startups. Chien said these companies are building networks where thousands of AI bots are interacting with the user’s content.
“It turns social into a single-player game. I’m not sure that it works,” he said. “The reason that people enjoy social networking is the understanding that there are real humans on the other side.”
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![IBM Crosses One of Computing’s Biggest Barriers With World’s First Sub-1 Nanometer Chip
In a major breakthrough, IBM revealed the world’s first semiconductor chip technology built on a sub-1 nanometer chipmaking process. For comparison, the process uses transistor features smaller than the width of a DNA strand, which measures about 2.5 nanometers across. The chip itself is about the size of a fingernail but holds almost 100 billion transistors, and the company expects it could enter markets as early as the next five years. In a statement released today, IBM said the new chip features nearly twice the density of its 2-nanometer chip, released in 2021. According to an accompanying technical report, the chip also demonstrated up to 70% greater energy efficiency than its predecessor. In designing the chip, researchers developed an “entirely new transistor architecture” called nanostack, which “vertically stacks and staggers transistors” to enable IBM’s 0.7-nanometer chip technology, IBM explained. A section of the chip seen with a transmission electron microscope. Credit: IBM “With our new nanostack architecture, we’re not just making smaller transistors,” Jay Gambetta, director of IBM Research, said in the statement. “We’re reinventing how chips are built to deliver dramatically more power and energy efficiency.”
Smaller and smaller Semiconductor chips enable things like computers, home appliances, communications, and transportation devices. In 1965, Intel co-founder Gordon Moore surmised that transistor capacities evolved at a predictable and consistent rate. Specifically, all things considered, the number of transistors on a semiconductor chip would double about every two years. For a while, the so-called Moore’s Law held rather well—until, that is, things hit a literal wall.
“Moore’s Law was never meant to last forever,” according to a blog post by the Massachusetts Institute of Technology’s (MIT) Computer Science and Artificial Intelligence Lab. “Transistors can only get so small and, eventually, the more permanent laws of physics get in the way.” That is, as companies try to cram more transistors into smaller chips, new advances in transistor technology take longer than two years, so Moore’s Law has been over since at least 2016, Charles Leiserson, a computer scientist at MIT, said in the blog. Accordingly, the issue now is to consider how improvements in chip performance fit into a longer-term picture, Willy Shih, an economist at Harvard Business School, said in an explainer.
Reaching atomic levels In that sense, IBM’s latest chip represents an inventive approach for bypassing the limits of physical scaling. Specifically, two wafers with nanosheet-style transistors are glued together like a sandwich to vertically stack two layers of transistors, and related technical assessments suggested that the wafer stacking was flexible and scalable enough to support real computation, Huiming Bu, vice president of IBM’s silicon technology research team, said in a press briefing on the chip. Researcher holding IBM’s sub-1 nm node wafer. Credit: IBM That said, this chip isn’t quite ready for manufacturing just yet. The company’s goal is to enter production in the next five years, but there’s still work to be done. For instance, Bu pointed out that the team was still working on pathways to prevent thermal noise or integration into existing systems in the high-performance computing community. “From my perspective, I hope to see it be as successful as the 2-nanometer [chip] and become the industry platform,” Gambetta said during the briefing. “And as we see with AI and classical computing in general, we are only seeing more and more consumption.” #IBM #Crosses #Computings #Biggest #Barriers #Worlds #Sub1 #Nanometer #ChipIBM,Semiconductors,transistors](https://gizmodo.com/app/uploads/2026/06/nanostacking-ibm-sub-nm-chip-1280x720.jpg "IBM Crosses One of Computing’s Biggest Barriers With World’s First Sub-1 Nanometer Chip
In a major breakthrough, IBM revealed the world’s first semiconductor chip technology built on a sub-1 nanometer chipmaking process. For comparison, the process uses transistor features smaller than the width of a DNA strand, which measures about 2.5 nanometers across. The chip itself is about the size of a fingernail but holds almost 100 billion transistors, and the company expects it could enter markets as early as the next five years. In a statement released today, IBM said the new chip features nearly twice the density of its 2-nanometer chip, released in 2021. According to an accompanying technical report, the chip also demonstrated up to 70% greater energy efficiency than its predecessor. In designing the chip, researchers developed an “entirely new transistor architecture” called nanostack, which “vertically stacks and staggers transistors” to enable IBM’s 0.7-nanometer chip technology, IBM explained. A section of the chip seen with a transmission electron microscope. Credit: IBM “With our new nanostack architecture, we’re not just making smaller transistors,” Jay Gambetta, director of IBM Research, said in the statement. “We’re reinventing how chips are built to deliver dramatically more power and energy efficiency.”
Smaller and smaller Semiconductor chips enable things like computers, home appliances, communications, and transportation devices. In 1965, Intel co-founder Gordon Moore surmised that transistor capacities evolved at a predictable and consistent rate. Specifically, all things considered, the number of transistors on a semiconductor chip would double about every two years. For a while, the so-called Moore’s Law held rather well—until, that is, things hit a literal wall.
“Moore’s Law was never meant to last forever,” according to a blog post by the Massachusetts Institute of Technology’s (MIT) Computer Science and Artificial Intelligence Lab. “Transistors can only get so small and, eventually, the more permanent laws of physics get in the way.” That is, as companies try to cram more transistors into smaller chips, new advances in transistor technology take longer than two years, so Moore’s Law has been over since at least 2016, Charles Leiserson, a computer scientist at MIT, said in the blog. Accordingly, the issue now is to consider how improvements in chip performance fit into a longer-term picture, Willy Shih, an economist at Harvard Business School, said in an explainer.
Reaching atomic levels In that sense, IBM’s latest chip represents an inventive approach for bypassing the limits of physical scaling. Specifically, two wafers with nanosheet-style transistors are glued together like a sandwich to vertically stack two layers of transistors, and related technical assessments suggested that the wafer stacking was flexible and scalable enough to support real computation, Huiming Bu, vice president of IBM’s silicon technology research team, said in a press briefing on the chip. Researcher holding IBM’s sub-1 nm node wafer. Credit: IBM That said, this chip isn’t quite ready for manufacturing just yet. The company’s goal is to enter production in the next five years, but there’s still work to be done. For instance, Bu pointed out that the team was still working on pathways to prevent thermal noise or integration into existing systems in the high-performance computing community. “From my perspective, I hope to see it be as successful as the 2-nanometer [chip] and become the industry platform,” Gambetta said during the briefing. “And as we see with AI and classical computing in general, we are only seeing more and more consumption.” #IBM #Crosses #Computings #Biggest #Barriers #Worlds #Sub1 #Nanometer #ChipIBM,Semiconductors,transistors")
![IBM Crosses One of Computing’s Biggest Barriers With World’s First Sub-1 Nanometer Chip
In a major breakthrough, IBM revealed the world’s first semiconductor chip technology built on a sub-1 nanometer chipmaking process. For comparison, the process uses transistor features smaller than the width of a DNA strand, which measures about 2.5 nanometers across. The chip itself is about the size of a fingernail but holds almost 100 billion transistors, and the company expects it could enter markets as early as the next five years. In a statement released today, IBM said the new chip features nearly twice the density of its 2-nanometer chip, released in 2021. According to an accompanying technical report, the chip also demonstrated up to 70% greater energy efficiency than its predecessor. In designing the chip, researchers developed an “entirely new transistor architecture” called nanostack, which “vertically stacks and staggers transistors” to enable IBM’s 0.7-nanometer chip technology, IBM explained. A section of the chip seen with a transmission electron microscope. Credit: IBM “With our new nanostack architecture, we’re not just making smaller transistors,” Jay Gambetta, director of IBM Research, said in the statement. “We’re reinventing how chips are built to deliver dramatically more power and energy efficiency.”
Smaller and smaller Semiconductor chips enable things like computers, home appliances, communications, and transportation devices. In 1965, Intel co-founder Gordon Moore surmised that transistor capacities evolved at a predictable and consistent rate. Specifically, all things considered, the number of transistors on a semiconductor chip would double about every two years. For a while, the so-called Moore’s Law held rather well—until, that is, things hit a literal wall.
“Moore’s Law was never meant to last forever,” according to a blog post by the Massachusetts Institute of Technology’s (MIT) Computer Science and Artificial Intelligence Lab. “Transistors can only get so small and, eventually, the more permanent laws of physics get in the way.” That is, as companies try to cram more transistors into smaller chips, new advances in transistor technology take longer than two years, so Moore’s Law has been over since at least 2016, Charles Leiserson, a computer scientist at MIT, said in the blog. Accordingly, the issue now is to consider how improvements in chip performance fit into a longer-term picture, Willy Shih, an economist at Harvard Business School, said in an explainer.
Reaching atomic levels In that sense, IBM’s latest chip represents an inventive approach for bypassing the limits of physical scaling. Specifically, two wafers with nanosheet-style transistors are glued together like a sandwich to vertically stack two layers of transistors, and related technical assessments suggested that the wafer stacking was flexible and scalable enough to support real computation, Huiming Bu, vice president of IBM’s silicon technology research team, said in a press briefing on the chip. Researcher holding IBM’s sub-1 nm node wafer. Credit: IBM That said, this chip isn’t quite ready for manufacturing just yet. The company’s goal is to enter production in the next five years, but there’s still work to be done. For instance, Bu pointed out that the team was still working on pathways to prevent thermal noise or integration into existing systems in the high-performance computing community. “From my perspective, I hope to see it be as successful as the 2-nanometer [chip] and become the industry platform,” Gambetta said during the briefing. “And as we see with AI and classical computing in general, we are only seeing more and more consumption.” #IBM #Crosses #Computings #Biggest #Barriers #Worlds #Sub1 #Nanometer #ChipIBM,Semiconductors,transistors](https://i1.wp.com/gizmodo.com/app/uploads/2026/06/nanostacking-ibm-sub-nm-chip-1280x720.jpg?ssl=1 "IBM Crosses One of Computing’s Biggest Barriers With World’s First Sub-1 Nanometer Chip
In a major breakthrough, IBM revealed the world’s first semiconductor chip technology built on a sub-1 nanometer chipmaking process. For comparison, the process uses transistor features smaller than the width of a DNA strand, which measures about 2.5 nanometers across. The chip itself is about the size of a fingernail but holds almost 100 billion transistors, and the company expects it could enter markets as early as the next five years. In a statement released today, IBM said the new chip features nearly twice the density of its 2-nanometer chip, released in 2021. According to an accompanying technical report, the chip also demonstrated up to 70% greater energy efficiency than its predecessor. In designing the chip, researchers developed an “entirely new transistor architecture” called nanostack, which “vertically stacks and staggers transistors” to enable IBM’s 0.7-nanometer chip technology, IBM explained. A section of the chip seen with a transmission electron microscope. Credit: IBM “With our new nanostack architecture, we’re not just making smaller transistors,” Jay Gambetta, director of IBM Research, said in the statement. “We’re reinventing how chips are built to deliver dramatically more power and energy efficiency.”
Smaller and smaller Semiconductor chips enable things like computers, home appliances, communications, and transportation devices. In 1965, Intel co-founder Gordon Moore surmised that transistor capacities evolved at a predictable and consistent rate. Specifically, all things considered, the number of transistors on a semiconductor chip would double about every two years. For a while, the so-called Moore’s Law held rather well—until, that is, things hit a literal wall.
“Moore’s Law was never meant to last forever,” according to a blog post by the Massachusetts Institute of Technology’s (MIT) Computer Science and Artificial Intelligence Lab. “Transistors can only get so small and, eventually, the more permanent laws of physics get in the way.” That is, as companies try to cram more transistors into smaller chips, new advances in transistor technology take longer than two years, so Moore’s Law has been over since at least 2016, Charles Leiserson, a computer scientist at MIT, said in the blog. Accordingly, the issue now is to consider how improvements in chip performance fit into a longer-term picture, Willy Shih, an economist at Harvard Business School, said in an explainer.
Reaching atomic levels In that sense, IBM’s latest chip represents an inventive approach for bypassing the limits of physical scaling. Specifically, two wafers with nanosheet-style transistors are glued together like a sandwich to vertically stack two layers of transistors, and related technical assessments suggested that the wafer stacking was flexible and scalable enough to support real computation, Huiming Bu, vice president of IBM’s silicon technology research team, said in a press briefing on the chip. Researcher holding IBM’s sub-1 nm node wafer. Credit: IBM That said, this chip isn’t quite ready for manufacturing just yet. The company’s goal is to enter production in the next five years, but there’s still work to be done. For instance, Bu pointed out that the team was still working on pathways to prevent thermal noise or integration into existing systems in the high-performance computing community. “From my perspective, I hope to see it be as successful as the 2-nanometer [chip] and become the industry platform,” Gambetta said during the briefing. “And as we see with AI and classical computing in general, we are only seeing more and more consumption.” #IBM #Crosses #Computings #Biggest #Barriers #Worlds #Sub1 #Nanometer #ChipIBM,Semiconductors,transistors")
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